科研论文
New
2024
Step-recovery with Multi-pulse Test (SRMPT) Characterization Technique for the Understanding of Border Traps in Ferroelectric Capacitors
nique for the Understanding of Border Traps in Ferroelectric Capacitors," in IEEE Electron Device Letters, doi: 10.1109/LED.2024.3439543....
New
2024
Modeling the Coupled Charge Trapping Dynamics in FeFETs for Reliability Characterizations
ge Trapping Dynamics in FeFETs for Reliability Characterizations," in IEEE Transactions on Electron Devices, vol. 71, no. 9, pp. 5779-5783, Sept. 2024, doi: 10.1109/TED.2024.3426430....
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2023
Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation
anism, Key Features and Mitigation," 2023 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2023, pp. 1-10, doi: 10.1109/IRPS48203.2023.10117677....
2024
Step-recovery with Multi-pulse Test (SRMPT) Characterization Technique for the Understanding of Border Traps in Ferroelectric Capacitors
Y. Wu et al., "Step-recovery with Multi-pulse Test (SRMPT) Characterization Technique for the Understanding of Border Traps in Ferroelectric Capacitors," in IEEE Electron Device Letters, doi: 10.1109/LED.2024.3439543.
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2024
Modeling the Coupled Charge Trapping Dynamics in FeFETs for Reliability Characterizations
P. Cai, H. Li, Z. Ji, L. Zhang, R. Wang and R. Huang, "Modeling the Coupled Charge Trapping Dynamics in FeFETs for Reliability Characterizations," in IEEE Transactions on Electron Devices, vol. 71, no. 9, pp. 5779-5783, Sept. 2024, doi: 10.1109/TED.2024.3426430.
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2024
On the Understanding and Modeling of Non-Negligible Subthreshold-State Degradation (SSD) in Sub-20-nm DRAM Technology
D. Wang et al., "On the Understanding and Modeling of Non-Negligible Subthreshold-State Degradation (SSD) in Sub-20-nm DRAM Technology," in IEEE Electron Device Letters, vol. 45, no. 9, pp. 1582-1585, Sept. 2024, doi: 10.1109/LED.2024.3425860.
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2024
Unveiling RowPress in Sub-20 nm DRAM Through Comparative Analysis With Row Hammer: From Leakage Mechanisms to Key Features
L. Zhou, S. Ye, R. Wang and Z. Ji, "Unveiling RowPress in Sub-20 nm DRAM Through Comparative Analysis With Row Hammer: From Leakage Mechanisms to Key Features," in IEEE Transactions on Electron Devices, vol. 71, no. 8, pp. 4677-4684, Aug. 2024, doi: 10.1109/TED.2024.3418300.
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2024
Study on the Anomalous Characteristics of Random Telegraph Noise in FeFETs
P. Cai, Y. Wu, Z. Sun, H. Li, X. Wang, Z. Ji*, R. Wang*, R. Huang, "Study on the Anomalous Characteristics of Random Telegraph Noise in FeFETs," 2024 IEEE Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA, 2024, pp. 35-36, doi: 10.1109/SNW63608.2024.10639214.
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2024
Understanding Retention Time Distribution in Buried-Channel-Array-Transistors (BCAT) Under Sub-20-nm DRAM Node—Part II: PBTI Aging and Optimization
Y. Liu et al., "Understanding Retention Time Distribution in Buried-Channel-Array-Transistors (BCAT) Under Sub-20-nm DRAM Node—Part II: PBTI Aging and Optimization," in IEEE Transactions on Electron Devices, doi: 10.1109/TED.2024.3409512.
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2024
Exploring tungsten-oxygen vacancy synergy: Impact on leakage characteristics in Hf0. 5Zr0. 5O2 ferroelectric thin films
Xuepei Wang, Maokun Wu, Ting Zhang, Boyao Cui, Yu-Chun Li, Jinhao Liu, Yishan Wu, Yichen Wen, Sheng Ye, Pengpeng Ren, David Wei Zhang, Hong-Liang Lu, Runsheng Wang, Zhigang Ji, Ru Huang; Exploring tungsten-oxygen vacancy synergy: Impact on leakage characteristics in Hf0.5Zr0.5O2 ferroelectric thin films. Appl. Phys. Lett. 3 June 2024; 124 (23): 232901.
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2024
High-Throughput Addressable Test Structure Design for Nano-Scaled CMOS Device Characterization
X. Wang, D. Wang, L. Guo, P. Ren and Z. Ji, "High-Throughput Addressable Test Structure Design for Nano-Scaled CMOS Device Characterization," in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2024.3393475.
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2024
A Simplified Method for RTN Assessment and Novel Understanding on AC RTN
C. Zhang, Y. Xiao, Y. Xue, D. Wang, P. Ren and Z. Ji, "A Simplified Method for RTN Assessment and Novel Understanding on AC RTN," 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA), HsinChu, Taiwan, 2024, pp. 1-2, doi: 10.1109/VLSITSA60681.2024.10546362.
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2024
A New Method of Automatic Extraction of RTN and OMI-Friendly Implementation
Y. Xiao, C. Zhang, D. Wang, Y. Xue, P. Ren and Z. Ji, "A New Method of Automatic Extraction of RTN and OMI-Friendly Implementation," 2024 IEEE International Reliability Physics Symposium (IRPS), Grapevine, TX, USA, 2024, pp. P75.TX-1-P75.TX-4, doi: 10.1109/IRPS48228.2024.10529452.
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